1. Field of the Invention
This invention generally relates to digital communication systems and, more particularly, to a system and method for efficiently interfacing time division multiplexed information streams into packet networks.
2. Description of the Related Art
Conventionally, voice has been carried over Time Division Multiplexed (TDM) networks, such as E1/T1/E3/T3 and SDH/SONET networks. The emergence of packet data communications, such as Internet Protocol (IP) networks, has led to the convergence of TDM traffic into the IP networks. Packet networks, which were initially designed to carry time-insensitive data traffic, are not designed to address the concerns of real-time services like voice and video, which are conventionally carried over TDM networks.
Digital transport networks evolved as isolated links connecting analog switching systems for analog Public Switched Telephone Networks (PSTNs). Originally, digitized voice channels were multiplexed onto serial streams, framed, and line coded with completely unsynchronized clocks. Digital communications evolved to Plesiochronous Digital Hierarchy (PDH), which permits clock rates of interfacing streams to vary from a nominal value with a given tolerance. The variance is resolved by elastic stores and, in higher multiplexing rates, by bit stuffing. There are three closely related standards for digital trunks of primary rate, E1-E3 (Asia and Europe), the T1-T3 (North America), and J1 -J3 (Japan). In a PDH transmission chain, a plurality of lower level digital signals are bit-wise, or bit and byte-wise time division multiplexed together to form a higher level signal, with the bit rate of the higher level signal being greater than the sum of the rates of the tributary signals to account for overhead functions in the higher rate signal, such as framing, parity, error detection, alarms, maintenance, and timing adjustment.
The bits of each lower level digital signal are written in an input buffer (one buffer per input tributary), with the write frequency equal to the incoming tributary instantaneous bit rate. The tributary bits are then read, according to a local system clock, and multiplexed by bit-interleaving or byte-interleaving. To take care of deviation in the rates between different tributaries and the multiplex signal, certain bit positions within the output multiplex frame (justification or stuffing opportunity bits) can carry either tributary or dummy bits. The justification decision (i.e., if the stuffing opportunity bit should carry information or be a dummy) is made frame-by-frame on the basis of a buffer threshold mechanism. Therefore, the actual number of tributary bits in the output multiplex frame varies dynamically and the transmission capacity gets adapted to the actual bit rate of the incoming tributary.
In a TDM format, data is transported in small chunks at a regular rate. The data stream is at a more or less uniform rate, with only small perturbations, which occur due to rate adaptation mechanisms within the network, or due to impairments in the network. Within such a network transport applications must maintain the uniformity of the data rate to within tight specifications, which is generally done using a phase conditioning circuit in the transmit path. Such a phase conditioning circuit works by storing data in a buffer and playing it out to a mapper at a regulated rate. In order to maintain low latency requirements, the buffer is small (of the order of several bytes).
Since PDH networks work on independent clocking mechanisms, the differences in clock rates result in buffer slips, whose effect is negligible in voice conversations, but detrimental to data and video traffic. To address this problem, network architectures (SDH/SONET) have been adopted where all the network elements are synchronized and running at the same average frequency. Transient variations are accommodated by a mechanism called pointer adjustments.
In SONET, the base signal is referred to as Synchronous Transport Signal level-1 (STS-1), which operates at 51.84 Mb/s. Higher-level signals are integer multiples of STS-1, creating the family of STS-N signals, for N=1, 3, 12, 48, 192, & 768. An STS-N signal is composed of N byte-interleaved STS-1 signals. The optical counterpart for each STS-N signal is designated as OC-N (Optical Carrier level-N). TDM traffic is mapped onto an SPE (SONET) or a virtual container (SDH), which in turn is associated with Path Over Head (POH) to form an Administrative Unit in SDH. The pointer mechanism is used to take care of the asynchronous phase of the SONET/SDH traffic and also to compensate for frequency offsets between transmission systems.
FIG. 1 depicts a conventional framer device used in transport applications (prior art). This device 100 has a line interface 102 on one side (e.g. to a SONET/SDH line) and a TDM interface 104 on the other side, which can interface to a cross-connect or protocol processor. The buffer (A) 106 used by the phase conditioning circuit (not shown), is operating in the transmit direction with respect to the line interface 102. In an end-to-end transport application the buffer 106 is used to condition the data rate coming from the TDM interface 104 and going out over line interface 102.
In a data-termination application timing can either be sourced from the framer, or by loop-timing from the receive direction. The loop timing is indicated by the arc marked “LT”. In data-termination applications, the data coming over the TDM interface 104 is generally sourced from a non-TDM source, e.g. a packet source like ATM packets, IP packets, or some other encapsulation for the data. The TDM interface 104 may still be used, but generally does not carry timing information, and flow control is used to control the data rate over that interface. As a result of this flow control, the data rate coming over the TDM interface can be significantly more variable than normal TDM data. The buffer 106 (buffer A) together with the phase conditioning circuit is then used to set the timing for the data, either via system timing or loop timing.
FIG. 2 shows the architecture of a typical system for transport of data over TDM and packet networks (prior art). The system 200 has a line interface 202 on one side, which would be a TDM interface such as a SONET/SDH interface or a PDH interface. This interface feeds a framer or multiplexer device tool for extracting the encapsulated TDM data and passes it to a protocol processor 206 over an interface 208a with flow-control support. The protocol processor 206 extracts the packetized data from the TDM data, or encapsulates the TDM data into packets and passes it to a network processor 210 for further processing or switching. In such a system, the information contained within the packets does not define the timing of the TDM streams over the line interface, and system or loop timing is used within the framer to set the timing on the transmit line interface 202. The system 200 maps between the small chunks of regular data in the TDM domain and less frequent, and generally less regular, large packets of data in the packet domain.
In such a system, data generally passes through multiple buffers. There may be a buffer in the protocol processor 212 (buffer B), and the size of this buffer depends on whether the protocol processor has a store-and-forward architecture with large buffers, or a cut-through architecture with small buffers. The network processor 210 generally has large buffers 214 (buffer C), which can be maintained in external system memory 216 as shown. These large buffers are tolerable because data latency is not a major concern in data applications, and the bursty nature of packet traffic, as compared with normal TDM data, requires larger buffers for storage.
FIG. 3 is a diagram depicting a simplified version of the system of FIG. 2 (prior art). The functions of the protocol and network processors can logically be combined into a “packet-processing” function as shown, where a generic packet processor 300 is shown replacing the separate protocol and networks processors of FIG. 2. The interface between the packet processor 300 and the framer/mapper 204 may be a packet interface in some implementations, or a TDM interface in other implementations.
Circuit-switched technology dedicates a fixed amount of bandwidth to a connection, regardless of actual bandwidth usage. These networks generally do not handle data efficiently or scale to cost-effectively accommodate data traffic growth. The primary disadvantage of SONET/SDH networks is that they are optimized for TDM traffic. The protocol lacks the functions required to handle data as efficiently as packet traffic.
Due to the growth of the Internet and multimedia traffic, packet networks (e.g., IP networks) have increased. The advantage of IP networks include their ability to handle variety of media types, simplicity, lower relative cost, resilience, less operations and administrative complexity, and the large amounts of bandwidth (tens of Mbps or Gbps). Packet-switched networks are designed for data communications and computer networking. The information is broken down into the form of small packets and such packets from multiple sources are sent over a single network simultaneously and reassembled at the destinations. Packet switching enables more efficient utilization of available network bandwidth than circuit-switching. A single node-to-node link can be dynamically shared by packets over time, assign priorities to packets, and block new connections as the traffic increases. Packet networks permit the cost-efficient expansion of capacity as communications traffic increases. Ethernet, as defined in IEEE 802.3, is the most popular networking technology used to transport IP packets.
Voice over Internet Protocol (VoIP) uses IP packets to transport voice bytes through an enterprise or access network, at the core of the network, or from end terminal to end terminal. In an enterprise scenario, IP Phones communicate to an IP PBX or a gateway over IP protocol where the voice channels are converted and switched through the circuit switched network. As applied to the edge of the network, the access is still circuit-switched or PSTN, and the voice connection is switched through the packet network using a media gate way. At the terminating end, another media gateway performs the protocol conversion, if the call is destined to a PSTN phone. For end-to-end IP phones, the IP packets containing voice are traversed all the way through packet networks, using a protocol such as H.323.
However, there is a need for applications that transport digital trunks themselves (e.g., PDH) over packet networks. These applications would be useful in the access networks as well as at the edge of networks, where legacy digital trunk infrastructure already exists.
Circuit Emulation Services (CES) is one technology intended for transporting E1/T1/E3/T3 or SONET/SDH traffic over packet networks. Pseudo Wire Emulation Edge-to-Edge (PWE3) defines the emulation of services (such as Frame Relay, ATM, Ethernet T1, E1, T3, E3, and SONET/SDH) over packet-switched networks (PSNs) using IP or multiprotocol label switching (MPLS). The Pseudo Wire functions include encapsulating the traffic, carrying it across a path or tunnel, managing timing and order, and any other operations required to emulate the behavior and characteristics of the service.
When emulating a TDM or circuit-switched service over the packet switched network, the characteristics of the emulated service are expected. Appropriate design considerations include availability, survivability, interoperability, delay, jitter, and wander. The most important problem to be solved is the effect of end-to-end delay and delay variation. The end-to-end delay is a result of the packetization, network transport delay, and de-packetization functions. The de-packetization function includes the jitter buffers which perform the delay equalization. Considering the fact that the network transport delay can be guaranteed in a well-controlled transport network, delay introduced by the packetization and de-packetization functions becomes crucial. The delay variation contributes to the jitter at the receiving end. Further, packet networks are prone to dropped or misaligned packets, which may be critical in circuit emulation services.
The other major problem in transporting TDM services on the packet networks is synchronization. In the Plesiochronous Digital Hierarchy (PDH) the timing is passed transparently through the networks, allowing the clock to be accurately regenerated at the remote end of the carrier network. In Synchronous Digital Hierarchy (SDH), physical line rates as well as external timing equipment provide timing information. However, the physical line rates on the packet networks are independent of the media data rates itself, and the timing information is degraded as soon the TDM traffic enters the packet domain.
It would be advantageous if timing-sensitive services could be incorporated into packet data architectures. It would be advantageous if a multistage architecture could be used to relieve a packet processor from managing phase conditioning at the bit level as required in TDM communications. It would also be advantageous if the multistage architecture could relieve a mapper from having to deal with large chunks of data when communicating time-sensitive communications.